The present invention relates to a synthesizer, and more particularly to a synthesizer that is employed for a frequency hopping and is capable of switching a frequency at a high speed.
Conventionally, the synthesizer of this kind is employed on the ground that it can generate an output clock signal of which a frequency is multiple times as great as an input clock frequency (for example, a non-patent document 1)
[Non-Patent Document 1]
RF Microelectronics, p. 252, FIG. 8.8, 1998. One example of such a first conventional synthesizer is shown in FIG. 35.
As shown in FIG. 35, the synthesizer that is a conventional example is configured of a phase detector 1025, a charge pump circuit 1026, a low-pass filter 1027, a voltage control oscillator (VCO) 1028, and a divider 1029.
Next, an operation of the above-mentioned synthesizer will be explained.
The phase detector 1025 and the charge pump circuit 1026 inject an electric charge into the low-pass filter 1027, or pull it out responding to a frequency difference between an input clock signal 1021 and an output signal 1024 of the divider 1029, and an input voltage 1022 of the VCO 1028 is feedback-controlled in such a manner that a frequency difference between the input clock signal 1021 and the output signal 1024 of the divider 1029 is decreased.
Continually, the VCO 1028 changes the frequency of an output clock signal 1023 with the input voltage 1022. And, when a frequency difference between the input clock signal 1021 and the output signal 1024 of the divider amounted to 0 (zero), the circuit operates in a stationary state. At this moment, the frequency of the output clock signal 1023 becomes a frequency obtained by increasing the frequency of the input clock signal 1021 by a factor of a frequency dividing rate.
Also, a second conventional synthesizer is employed on the ground that the output signal having a frequency of ω1±ω2 is obtained from the input signal having a frequency ω1 and the input signal having a frequency ω2 (for example, a non-patent document 2)
[Non-Patent Document 2]
RF Microelectronics, p. 244, FIG. 7.46, 1998. One example of such a second conventional synthesizer is shown in FIG. 36.
As shown in FIG. 36, the second conventional synthesizer is configured of a mixer 1103, and a band pass filter 1105.
Next, an operation of the second conventional synthesizer will be explained.
At first, by inputting a first input signal 1101 of which a frequency is ω1, and a second input signal 1102 of which a frequency is ω2 into the mixer 1103, a mixer output signal 1104 of which a frequency is ω1±ω2 is obtained.
Next, by inputting this mixer output signal 1104 into the band pass filter 1105, and by removing the other signal than ω1+ω2 or ω1−ω2, an output signal 1106 of the band pass filter having one peak of a spectrum is obtained.
Also, a third conventional synthesizer was employed on the ground that the output clock signal frequency was able to be switched in a fine adjustment manner, and at a high speed (for example, a non-patent document 3).
[Non-Patent Document 3]
RF Microelectronics, p. 285 to 289, FIG. 8.47, 1998. Such a third conventional synthesizer is shown in FIG. 37.
As shown in FIG. 37, the third conventional synthesizer is configured of a counter 1202, and a DA converter 1204.
Next, an operation of the third conventional synthesizer will be explained. The counter 1202 counts a clock number of an input clock signal 1201. Continually, an output signal 1203 of this counter is converted from a digital signal into an analogue signal by the DA converter 1204 to generate an output clock signal 1205. At this moment, the period (frequency) of the output clock signal 1205 is switched with a control signal 1206 of the counter.
A first problem of the foregoing conventional synthesizer lies in that the frequency of the output clock signal is impossible to switch at a high speed. Its reason is that plural-time feedback controls are required until the frequency of the output clock signal comes into a stationary state even though a frequency dividing rate is switched, or the frequency of the input clock signal is switched.
Also, a second problem of the foregoing conventional synthesizer lies in that the frequency of the output clock signal is impossible to switch in a broad band. Its reason is that a central frequency of the band pass filter is impossible to switch responding to the output frequency of this mixer even though the output frequency of the mixer is switched by switching the frequency of the input signal.
Further, a third problem of the foregoing conventional synthesizer lies in that the period of the output clock signal to be switched is impossible to partition, or a period length of the output clock signal to be switched is impossible to adjust finely at a frequency equal to or less than the frequency of the input clock signal. Its reason is that only the counting number of the input clock signal decides the period of the output clock signal.